1. Getting Started
3. Basics
4. 1. Tutorial
5. 1. 1.1. FIR Filter
   2. 1.2. FIFO without duplication
6. 2. Concepts
7. 1. 2.1. Signals
   2. 2.2. Interfaces
   3. 2.3. Modules
   4. 2.4. Interface Combinators
9. Advanced Features
10. 3. Implementing Your Own Combinators
11. 4. Dependency Types
13. Case Studies
14. 5. CPU Core (5-Stage Pipelined)
15. 1. 5.1. Hazards
    2. 5.2. Implementation
    3. 1. 5.2.1. Fetch
       2. 5.2.2. Decode
       3. 5.2.3. Execute
       4. 5.2.4. Memory
       5. 5.2.5. Writeback
16. 6. NPU Core (Based on Systolic Array)
19. Contributors